Operation In Clock Synchronous Mode - Renesas H8S Family Hardware Manual

Section 13 Serial Communication Interface (SCI)

Operation in Clock Synchronous Mode

Figure 13.14 shows the general format for clock synchronous communication. In clock

synchronous mode, data is transmitted or received in synchronization with clock pulses. One

character in transfer data consists of 8-bit data. In data transmission, the SCI outputs data from one

falling edge of the synchronization clock to the next. In data reception, the SCI receives data in

synchronization with the rising edge of the synchronization clock. After 8-bit data is output, the

transmission line holds the MSB state. In clock synchronous mode, no parity or multiprocessor bit

is added. Inside the SCI, the transmitter and receiver are independent units, enabling full-duplex

communication by use of a common clock. Both the transmitter and the receiver also have a

double-buffered structure, so that the next transmit data can be written during transmission or the

previous receive data can be read during reception, enabling continuous data transfer.

Synchronization

Note: * High except in continuous transfer

Figure 13.14 Data Format in Synchronous Communication (LSB-First)

Either an internal clock generated by the on-chip baud rate generator or an external

synchronization clock input at the SCK pin can be selected, according to the setting of the CKE1

and CKE0 bits in SCR. When the SCI is operated on an internal clock, the synchronization clock

is output from the SCK pin. Eight synchronization clock pulses are output in the transfer of one

character, and when no transfer is performed the clock is fixed high.

Rev. 1.00 Mar. 12, 2008 Page 466 of 1178

REJ09B0403-0100

One unit of transfer data (character or frame)