Table Of Instructions Classified By Function - Renesas H8S Family Hardware Manual

Section 2 CPU
2.6.1

Table of Instructions Classified by Function

Tables 2.3 to 2.10 summarize the instructions in each functional category. The notation used in
tables 2.3 to 2.10 is defined below.
Table 2.2 Operation Notation
Symbol
Rd
Rs
Rn
ERn
MAC
(EAd)
(EAs)
EXR
CCR
N
Z
V
C
PC
SP
#IMM
disp
+
–
×
÷
∧
∨
⊕
→
∼
:8/:16/:24/:32
Note: * General registers include 8-bit registers (R0H to R7H, R0L to R7L), 16-bit registers (R0
to R7, E0 to E7), and 32-bit registers (ER0 to ER7).
Rev. 1.00 Mar. 12, 2008 Page 40 of 1178
REJ09B0403-0100
Description
General register (destination)*
General register (source)*
General register*
General register (32-bit register)
Multiply-accumulate register (32-bit register)
Destination operand
Source operand
Extended control register
Condition-code register
N (negative) flag in CCR
Z (zero) flag in CCR
V (overflow) flag in CCR
C (carry) flag in CCR
Program counter
Stack pointer
Immediate data
Displacement
Addition
Subtraction
Multiplication
Division
Logical AND
Logical OR
Logical XOR
Move
NOT (logical complement)
8-, 16-, 24-, or 32-bit length