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• PA6/ExIRQ6/EVENT6/A22/LNKSTA
The pin function is switched as shown below according to the setting of address 18 and the
PA6DDR bit.
Setting the ISS6 bit in ISSR makes the pin to function as the ExIRQ6 input pin.
When using the pin as the ExIRQ6 input, or an EVENT input pin, clear the PA6DDR bit to 0.
Though the settings for the EVENT input pin have been made, set the PA6DDR bit to 1 when
using the pin as the PA6 or A22 output pin.
When the module stop mode is cleared in both the EtherC and E-DMAC, this pin functions as
the LNKSTA input pin.
PA6DDR
Address 18
Pin function
ExIRQ6 input pin/EVENT6 input pin
• PA5/ExIRQ5/EVENT5/A21/WOL
The pin function is switched as shown below according to the setting of the address 18, and the
PA5DDR bit.
Setting the ISS5 bit in ISSR makes the pin to function as the ExIRQ5 input pin.
When using the pin as the ExIRQ5 input, or an EVENT input pin, clear the PA5DDR bit to 0.
Though the settings for the EVENT input pin have been made, set the PA5DDR bit to 1 when
using the pin as the PA21 or Am output pin.
When the module stop mode is cleared in poth the EtherC and E-DMAC, this pin functions as
the WOL input pin.
PA5DDR
Address 18
Pin function
0
PA6 input pin
0
PA5 input pin
ExIRQ5 input pin/
EVENT5 input pin
1
PA6 output pin
1
1
PA5 output pin
Rev. 1.00 Mar. 12, 2008 Page 325 of 1178
Section 8 I/O Ports
1
A22 output pin
1
0
A21 output pin
REJ09B0403-0100
1
0
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