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18.3.7
I
C Bus Status Register (ICSR)
ICSR consists of status flags. Refer to tables 18.4 and 18.5 as well.
Bit
Bit Name
7
ESTP
6
STOP
5
IRTR
Initial
Value
R/W
Description
0
R/(W)* Error Stop Condition Detection Flag
This bit is valid in I
[Setting condition]
When a stop condition is detected during frame transfer.
[Clearing conditions]
•
•
0
R/(W)* Normal Stop Condition Detection Flag
This bit is valid in I
[Setting condition]
When a stop condition is detected after frame transfer is
completed.
[Clearing conditions]
•
•
2
0
R/(W)* I
C Bus Interface Continuous Transfer Interrupt Request
Flag
Indicates that the I
request to the CPU, and the source is completion of
reception/transmission of one frame in continuous
transmission/reception for which DTC activation is
possible. When the IRTR flag is set to 1, the IRIC flag is
also set to 1 at the same time.
[Setting conditions]
2
I
C bus format slave mode:
•
2
I
C bus format master mode or clocked synchronous serial
format mode:
•
[Clearing conditions]
•
•
2
C bus format slave mode.
When 0 is written in ESTP after reading ESTP = 1
When the IRIC flag in ICCR is cleared to 0
2
C bus format slave mode.
When 0 is written in STOP after reading STOP = 1
When the IRIC flag is cleared to 0
2
C bus interface has issued an interrupt
When the ICDRE or ICDRF flag in ICDR is set to 1
when AASX = 1
When the ICDRE or ICDRF flag is set to 1
When 0 is written after reading IRTR = 1
When the IRIC flag is cleared to 0 while ICE is 1
Rev. 1.00 Mar. 12, 2008 Page 607 of 1178
2
Section 18 I
C Bus Interface (IIC)
REJ09B0403-0100
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