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9.3.3
PWMX (D/A) Control Register (DACR)
DACR enables the PWM outputs, and selects the output phase and operating speed.
Bit
Bit Name
Initial Value
7
0
6
PWME
0
5
1
4
1
3
OEB
0
2
OEA
0
1
OS
0
0
CKS
0
Rev. 1.00, 09/03, page 230 of 704
R/W
Description
R/(W) Reserved
The initial value should not be changed.
R/W
PWMX Enable
Starts or stops DACNT.
0: DACNT operates as a 14-bit up-counter
1: DACNT halts at H'0003
Reserved
These bits are always read as 1 and cannot be
modified.
R/W
Output Enable B
Enables or disables output on PWMX (D/A) channel B.
0: PWMX (D/A) channel B output (at the PWX1 output
pin) is disabled
1: PWMX (D/A) channel B output (at the PWX1 output
pin) is enabled
R/W
Output Enable A
Enables or disables output on PWMX (D/A) channel A.
0: PWMX (D/A) channel A output (at the PWX0 output
pin) is disabled
1: PWMX (D/A) channel A output (at the PWX0 output
pin) is enabled
R/W
Output Select
Selects the phase of the PWMX (D/A) output.
0: Direct PWMX (D/A) output
1: Inverted PWMX (D/A) output
R/W
Clock Select
Selects the PWMX (D/A) resolution. Eight kinds of
resolution can be selected.
0: Operates at resolution (T) = system clock cycle time
(t
)
cyc
1: Operates at resolution (T) = system clock cycle time
) × 2, × 64, × 128, × 256, × 1024, × 4096, and
(t
cyc
× 16384.
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