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Section 3 MCU Operating Modes
3.3
Operating Mode Descriptions
3.3.1
Mode 4
The CPU operating mode is advanced mode in which the address space is 16 Mbytes, and the on-
chip ROM is disabled.
The initial bus mode immediately after a reset is 16 bits, with 16-bit access to all areas. Ports D, E,
and F function as an address bus, ports H and I function as a data bus, and parts of ports A and B
function as bus control signals. However, if all areas are designated as an 8-bit access space by the
bus controller, the bus mode switches to 8 bits, and only port H functions as a data bus.
3.3.2
Mode 5
The CPU operating mode is advanced mode in which the address space is 16 Mbytes, and the on-
chip ROM is disabled.
The initial bus mode immediately after a reset is 8 bits, with 8-bit access to all areas. Ports D, E,
and F function as an address bus, port H functions as a data bus, and parts of ports A and B
function as bus control signals. However, if all areas are designated as a 16-bit access space by the
bus controller, the bus mode switches to 16 bits, and ports H and I function as a data bus.
Rev.2.00 Jun. 28, 2007 Page 66 of 666
REJ09B0311-0200
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