Section 6 Bus Controller (Bsc); Register Descriptions; Bus Control Register (Bcr) - Renesas H8S/2100 Series Hardware Manual

Since this LSI does not have an externally extended function, it does not have an on-chip bus
controller (BSC). Considering the software compatibility with similar products, you must be
careful to set appropriate values to the control registers for the bus controller.
6.1

Register Descriptions

The bus controller has the following registers.
Table 6.1 Register Configuration
Register Name
Bus control register
Wait state control register
6.1.1

Bus Control Register (BCR)

Bit Bit Name
7 —
6 ICIS0
5 BRSTRM 0
4 BRSTS1 1
3 BRSTS0 0

2
1 IOS1
0 IOS0

Section 6 Bus Controller (BSC)

Abbreviation
BCR
WSCR
Initial
Value R/W
1 R/W
1 R/W
R/W
R/W
R/W
0 R/W
1 R/W
1 R/W
R/W Initial Value Address
R/W H'D3
R/W H'F3
Description
Reserved
The initial value should not be changed.
Idle Cycle Insertion
The initial value should not be changed.
Burst ROM Enable
The initial value should not be changed.
Burst Cycle Select 1
The initial value should not be changed.
Burst Cycle Select 0
The initial value should not be changed.
Reserved
The initial value should not be changed.
IOS Select 1 and 0
The initial value should not be changed.
Rev. 1.00 Apr. 28, 2008 Page 133 of 994
Section 6 Bus Controller (BSC)
Data Bus
Width
H'FFC6 8
H'FFC7 8
REJ09B0452-0100