Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1504

ADSP-SC58x USB Register Descriptions
Table 27-19: USB_EP0I_CFGDATA[N] Register Fields (Continued)
Bit No.
(Access)
4 HBRX
(R1/NW)
3 HBTX
(R1/NW)
2 DYNFIFO
(R1/NW)
1 SOFTCON
(R1/NW)
0 UTMIWID
(R0/W)
27–92
Bit Name
High-Bandwidth Rx Enable.
The USB_EP0I_CFGDATA[N].HBRX bit indicates whether the USB controller
supports high-bandwidth receive ISO endpoint.
High-Bandwidth Tx Enable.
The USB_EP0I_CFGDATA[N].HBTX bit indicates whether the USB controller
supports high-bandwidth transmit ISO endpoint.
Dynamic FIFO Size Enable.
The USB_EP0I_CFGDATA[N].DYNFIFO bit indicates whether the USB control-
ler uses dynamic FIFO size support (on products supporting this feature), enabling the
dynamic FIFO registers. These registers are accessed using the configuration set in the
endpoints indexed FIFO size and FIFO address registers, except for endpoint 0.
Soft Connect Enable.
The USB_EP0I_CFGDATA[N].SOFTCON bit indicates whether the USB control-
ler uses soft connect.
UTMI Data Width.
The USB_EP0I_CFGDATA[N].UTMIWID bit indicates whether the USB control-
ler uses an 8-bit or 16-bit UTMI data width.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 No High-Bandwidth Rx
1 High-Bandwidth Rx
0 No High-Bandwidth Tx
1 High-Bandwidth Tx
0 No Dynamic FIFO Size
1 Dynamic FIFO Size
0 No Soft Connect
1 Soft Connect
0 8-bit UTMI Data Width
1 16-bit UTMI Data Width