Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1505

EP0 Number of Received Bytes Register
The
USB_EP0I_CNT[N]
returned changes as the contents of the FIFO change. It is only valid while the
USB_EP0_CSR[n]_H.RXPKTRDY bit or USB_EP0_CSR[n]_P.RXPKTRDY bit is set.
Figure 27-44: USB_EP0I_CNT[N] Register Diagram
Table 27-20: USB_EP0I_CNT[N] Register Fields
Bit No.
(Access)
6:0 RXCNT
(R/NW)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register indicates the number of received data bytes in the endpoint 0 FIFO. The value
15 14 13
0 0 0
RXCNT (R)
Rx Byte Count Value
Bit Name
Rx Byte Count Value.
The USB_EP0I_CNT[N].RXCNT bits holds the number of data bytes currently in
line ready to be read from the Rx FIFO. The value returned changes as the FIFO is
unloaded. It is only valid while the USB_EP0_CSR[n]_H.RXPKTRDY bit or
USB_EP0_CSR[n]_P.RXPKTRDY bit is set.
12 11 10 9 8 7 6 5
0 0 0 0 0 0 0 0
Description/Enumeration
ADSP-SC58x USB Register Descriptions
4 3 2 1 0
0 0 0 0 0
27–93