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The register list gives information on the on-chip I/O register addresses, how the register bits are
configured, and the register states in each operating mode. The information is given as shown
below.
1. Register Addresses (address order)
• Registers are listed from the lower allocation addresses.
• The MSB-side address is indicated for 16-bit and 32-bit addresses.
• Registers are classified by functional modules.
• The access size is indicated.
2. Register Bits
• Bit configurations of the registers are described in the same order as the Register Addresses
(address order) above.
• Reserved bits are indicated by in the bit name column.
• The bit number in the bit-name column indicates that the whole register is allocated as a
counter or for holding data.
• 16-bit registers are indicated from the bit on the MSB side, in 2 lines of eight bits.
• 32-bit registers are indicated from the bit on the MSB side, in 4 lines of eight bits.
3. Register States in Each Operating Mode
• Register states are described in the same order as the Register Addresses (address order)
above.
• The register states described here are for the basic operating modes. If there is a specific reset
for an on-chip peripheral module, refer to the section on that on-chip peripheral module.
Section 29 List of Registers
Section 29 List of Registers
Rev. 1.00 Mar. 12, 2008 Page 1073 of 1178
REJ09B0403-0100
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