Register States In Each Operating Mode - Renesas H8S Family Hardware Manual

Section 29 List of Registers
29.3

Register States in Each Operating Mode

Register
Reset
Abbreviation
ECMR Initialized
ECSR Initialized
ECSIPR Initialized
PIR Initialized
MAHR Initialized
MALR Initialized
RFLR Initialized
PSR Initialized
TROCR Initialized
CDCR Initialized
LCCR Initialized
CNDCR Initialized
CEFCR Initialized
FRECR Initialized
TSFRCR Initialized
TLFRCR Initialized
RFCR Initialized
MAFCR Initialized
IPGR Initialized
APR Initialized
MPR Initialized
TPAUSER Initialized
EDMR Initialized
EDTRR Initialized
EDRRR Initialized
TDLAR Initialized
RDLAR Initialized
Rev. 1.00 Mar. 12, 2008 Page 1106 of 1178
REJ09B0403-0100
High-Speed/
WDT Reset
Medium-Speed

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized

Initialized
Software
Sleep Module Stop
Standby
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
Hardware
Module
Standby
Initialized EtherC
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized E-DMAC
Initialized
Initialized
Initialized
Initialized