6.5.3
Basic Operation Timing in Normal Extended Mode
8-Bit, 2-State Access Space:
Figure 6.5 shows the bus timing for an 8-bit, 2-state access space. When an 8-bit access space is
accessed, the upper half (D15 to D8) of the data bus is used. Wait states cannot be inserted.
Read
Write
Note: n = 1 to 3
Figure 6.5 Bus Timing for 8-Bit, 2-State Access Space
Address bus
D15 to D8
D7 to D0
D15 to D8
Bus cycle
T 1
T 2
Valid
Rev. 1.00, 09/03, page 105 of 704
Valid
Invalid