Multiprocessor Serial Data Reception; Figure 12.12 Example Of Sci Operation For Reception (Example With 8-Bit Data, Multiprocessor Bit, One Stop Bit) - Renesas H8SX/1520 Series Hardware Manual

12.5.2

Multiprocessor Serial Data Reception

Figure 12.13 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data
with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is
generated at this time. All other SCI operations are the same as in asynchronous mode. Figure
12.12 shows an example of SCI operation for multiprocessor format reception.
1
MPIE
RDRF
RDR
value
1
MPIE
RDRF
RDR
value
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Start Data (ID1)
bit
0 D0 D1 D7
MPIE = 0
RXI interrupt
request
(multiprocessor
interrupt)
generated
Start Data (ID2)
bit
0 D0 D1 D7
ID1
MPIE = 0
RXI interrupt
request
(multiprocessor
interrupt)
generated
Figure 12.12 Example of SCI Operation for Reception
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)
Section 12 Serial Communication Interface (SCI)
Stop Start
MPB bit bit
1 1 0 D0
RDR data read
and RDRF flag
cleared to 0 in
RXI interrupt
processing routine
(a) Data does not match station's ID
Stop Start
MPB bit bit
1 1 0 D0
RDR data read and
RDRF flag cleared
to 0 in RXI interrupt
processing routine
(b) Data matches station's ID
Data (Data 1) Stop
MPB bit
D1 D7 0
ID1
If not this station's ID, RXI interrupt request is
MPIE bit is set to 1 not generated, and RDR
again retains its state
Data (Data 2) Stop
MPB bit
D1 D7 0
ID2
Matches this station's ID,
so reception continues, and
data is received in RXI
interrupt processing routine
Rev. 3.00 Mar. 14, 2006 Page 419 of 804
1
1 Idle state
(mark state)
1
1 Idle state
(mark state)
Data 2
MPIE bit set to 1
again
REJ09B0104-0300