Multiprocessor Serial Data Reception - Renesas H8/36912 Series User Manual

16-bit single-chip microcomputer

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Multiprocessor Serial Data Reception

Figure 14.18 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in

SCR3 is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data

with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is

generated at this time. All other SCI3 operations are the same as those in asynchronous mode.

Figure 14.19 shows an example of SCI3 operation for multiprocessor format reception.

Rev. 1.00, 11/03, page 218 of 376

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