Renesas H8S Family Hardware Manual page 997

SCI Interface Setting by Host

When boot mode is initiated, this LSI measures the low period of asynchronous SCI-communica-

tion data (H'00), which is transmitted consecutively by the host. The SCI transmit/receive format

is set to 8-bit data, 1 stop bit, and no parity. This LSI calculates the bit rate of transmission by the

host by means of the measured low period and transmits the bit adjustment end sign (1 byte of

H'00) to the host. The host must confirm that this bit adjustment end sign (H'00) has been received

normally and transmits 1 byte of H'55 to this LSI. When reception is not executed normally, boot

mode is initiated again (reset) and the operation described above must be executed. The bit rate

between the host and this LSI is not matched by the bit rate of transmission by the host and system

clock frequency of this LSI. To operate the SCI normally, the transfer bit rate of the host must be

set to 9,600 bps or 19,200 bps.

The system clock frequency, which can automatically adjust the transfer bit rate of the host and

the bit rate of this LSI, is shown in table 25.6. Boot mode must be initiated in the range of this

system clock.

Figure 25.7 Automatic-Bit-Rate Adjustment Operation of SCI

Table 25.6 System Clock Frequency for Automatic-Bit-Rate Adjustment by This LSI

Bit Rate of Host

Measure low period (9 bits) (data is H'00)

System Clock Frequency

20 to 34 MHz

Rev. 1.00 Mar. 12, 2008 Page 949 of 1178

Section 25 Flash Memory

High period of

at least 1 bit

REJ09B0403-0100