Multiprocessor Serial Data Reception; Figure 12.12 Example Of Sci Operation For Reception (Example With 8-Bit Data, Multiprocessor Bit, One Stop Bit) - Renesas H8SX/1500 Series Hardware Manual

12.5.2

Multiprocessor Serial Data Reception

Figure 12.13 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data
with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is
generated at this time. All other SCI operations are the same as in asynchronous mode. Figure
12.12 shows an example of SCI operation for multiprocessor format reception.
Start
1 bit
0 D0
MPIE
RDRF
RDR
value
MPIE = 0
Start
1 bit
0 D0
MPIE
RDRF
RDR
value
MPIE = 0
Figure 12.12 Example of SCI Operation for Reception
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)
Data (ID1)
MPB
D1 D7 1
RXI interrupt
request
(multiprocessor
interrupt)
generated
(a) Data does not match station's ID
Data (ID2)
MPB
D1 D7 1
ID1
RXI interrupt
request
(multiprocessor
interrupt)
generated
(b) Data matches station's ID
Section 12 Serial Communication Interface (SCI)
Stop Start Data (Data 1)
bit bit
1 0 D0 D1
RDR data read If not this station's ID,
and RDRF flag MPIE bit is set to 1
cleared to 0 in again
RXI interrupt
processing routine
Stop Start Data (Data 2)
bit bit
1 0 D0 D1
RDR data read and Matches this station's ID,
RDRF flag cleared so reception continues, and
to 0 in RXI interrupt data is received in RXI
processing routine interrupt processing routine
Rev. 3.00 Mar. 14, 2006 Page 419 of 804
Stop
MPB bit
1
D7 0 1 Idle state
(mark state)
ID1
RXI interrupt request is
not generated, and RDR
retains its state
Stop
1
MPB bit
D7 0 1 Idle state
(mark state)
ID2 Data 2
MPIE bit set to 1
again
REJ09B0104-0300