Multiprocessor Serial Data Reception - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
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14.5.2

Multiprocessor Serial Data Reception

Figure 14.13 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is received. On receiving
data with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request
is generated at this time. All other SCI operations are the same as in asynchronous mode. Figure
14.12 shows an example of SCI operation for multiprocessor format reception.
Rev. 2.00, 05/03, page 554 of 820

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