Freescale Semiconductor MPC8313E Family Reference Manual page 745

eTSEC1
Offset
0x2_42D0– Reserved
0x2_42FC
0x2_4300 RCTRL—Receive control register
0x2_4304 RSTAT—Receive status register
0x2_4308– Reserved
0x2_430C
0x2_4310 RXIC—Receive interrupt coalescing register
0x2_4314 RQUEUE*—Receive queue control register.
0x2_4318– Reserved
0x2_432C
0x2_4330 RBIFX*—Receive bit field extract control register
0x2_4334 RQFAR*—Receive queue filing table address register
0x2_4338 RQFCR*—Receive queue filing table control register
0x2_433C RQFPR*—Receive queue filing table property register
0x2_4340 MRBLR—Maximum receive buffer length register
0x2_4344– Reserved
0x2_4380
0x2_4380 RBDBPH*—Rx data buffer pointer high bits
0x2_4384 RBPTR0—RxBD pointer for ring 0
0x2_4388 Reserved
0x2_438C RBPTR1*—RxBD pointer for ring 1
0x2_4390 Reserved
0x2_4394 RBPTR2*—RxBD pointer for ring 2
0x2_4398 Reserved
0x2_439C RBPTR3*—RxBD pointer for ring 3
0x2_43A0 Reserved
0x2_43A4 RBPTR4*—RxBD pointer for ring 4
0x2_43A8 Reserved
0x2_43AC RBPTR5*—RxBD pointer for ring 5
0x2_43B0 Reserved
0x2_43B4 RBPTR6*—RxBD pointer for ring 6
0x2_43B8 Reserved
0x2_43BC RBPTR7*—RxBD pointer for ring 7
0x2_43C0– Reserved
0x2_44400
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Table 15-4. Module Memory Map (continued)
1
Name
eTSEC Receive Control and Status Registers
Enhanced Three-Speed Ethernet Controllers
2
Access Reset
— —
R/W All zeros
w1c All zeros
— —
R/W All zeros
R/W 0x0080_0080
— —
R/W All zeros
R/W All zeros
R/W 0x nnnn_nnnn
R/W 0x nnnn_nnnn
R/W All zeros
— —
R/W All zeros
R/W All zeros
— —
R/W All zeros
— —
R/W All zeros
— —
R/W All zeros
— —
R/W All zeros
— —
R/W All zeros
— —
R/W All zeros
— —
R/W All zeros
— —
Section/Page
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15.5.3.3.1/15-49
15.5.3.3.2/15-51
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15.5.3.3.3/15-53
15.5.3.3.4/15-54
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15.5.3.3.5/15-54
15.5.3.3.6/15-56
15.5.3.3.7/15-56
15.5.3.3.8/15-58
15.5.3.3.9/15-61
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15.5.3.3.10/15-62
15.5.3.3.11/15-62
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15.5.3.3.11/15-62
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15.5.3.3.11/15-62
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15.5.3.3.11/15-62
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15.5.3.3.11/15-62
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15.5.3.3.11/15-62
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15.5.3.3.11/15-62
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15.5.3.3.11/15-62
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15-15