Timer Accumulator Register (Tmr_Acc); Timer Prescale Register (Tmr_Prsc); Timer Offset Register (Tmroff_H/L) - Freescale Semiconductor MPC8313E Family Reference Manual

15.5.3.10.9 Timer Accumulator Register (TMR_ACC)

Timer accumulator register accumulates the value of the addend register into it. An overflow pulse of the
accumulator is used to increment the timer clock by TMR_CTRL[TCLK_PERIOD]. This register is read
only in normal operation. The register in eTSEC1 is shared for all eTSECs.
definition of the TMR_ACC register.
Offset eTSEC1:0x2_4E24
0
R
W
Reset
Table 15-119 describes the fields of the TMR_ACC register.
Bits Name
0–31 TMR_ACC

15.5.3.10.10 Timer Prescale Register (TMR_PRSC)

Timer generated output clock prescale register. It is used to adjust output clock frequency that is put onto
the 1588 clock output signal. The register in eTSEC1 is shared for all eTSECs.
the definition for the TMR_PRSC register.
Offset eTSEC1:0x2_4E28
0
R
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Table 15-120 describes the fields of the TMR_PRSC register.
Bits Name
0–15 — Reserved
16–31 PRSC_OCK Output clock division/prescale factor. Output clock is generated by dividing the timer input clock by this
number. Programmed value in this field must be greater than 1. Any value less than 1 is treated as 2.

15.5.3.10.11 Timer Offset Register (TMROFF_H/L)

The timer offset register is used to provide current time by adding its value to the clock counter.
Figure 15-115 describes the definition of the TMROFF_H/L register.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Figure 15-113. TMR_ACC Register Definition
Table 15-119. TMR_ACC Register Field Descriptions
32-bit timer accumulator register
—
Figure 15-114. TMR_PRSC Register Definition
Table 15-120. TMR_PRSC Register Field Descriptions
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TMR_ACC
All zeros
Description
15 16
PRSC_OCK
Description
Figure 15-113 describes the
Access: Read/Write
Figure 15-114 describes
Access: Read/Write
31
31
15-119