System Global Interrupt Configuration Register (Sicfr) - Freescale Semiconductor MPC8313E Family Reference Manual

Powerquicc ii pro integrated processor

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System internal interrupt group D priority register (SIPRR_D)

System internal interrupt mask register (SIMSR_H)

System internal interrupt mask register (SIMSR_L)

System internal interrupt control register (SICNR)

System external interrupt pending register (SEPNR)

System mixed interrupt group A priority register (SMPRR_A)

System mixed interrupt group B priority register (SMPRR_B)

System external interrupt mask register (SEMSR)

System external interrupt control register (SECNR)

System error status register (SERSR)

System error mask register (SERMR)

System error control register (SERCR)

System internal interrupt force register (SIFCR_H)

System internal interrupt force register (SIFCR_L)

System external interrupt force register (SEFCR)

System error force register (SERFR)

System critical interrupt vector register (SCVCR)

System management interrupt vector register (SMVCR)

System Global Interrupt Configuration Register (SICFR)

SICFR, shown in

spread in the priority table. See

Figure 8-2. System Global Interrupt Configuration Register (SICFR)

defines the bit fields of SICFR.

MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3

Freescale Semiconductor

Table 8-3. IPIC Register Address Map (continued)

8-2, defines the highest priority interrupt and whether interrupts are grouped or

for more information.

— MPSB MPSA — IPSD IPSC IPSB IPSA

Integrated Programmable Interrupt Controller (IPIC)

Access: Read/write

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