Freescale Semiconductor MPC8313E Family Reference Manual page 731

Powerquicc ii pro integrated processor

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Enhanced Three-Speed Ethernet Controllers

The enhanced three-speed Ethernet controllers (eTSECs) of the device interface to 10 Mbps, 100 Mbps,

and 1 Gbps Ethernet/IEEE Std 802.3® networks. For Ethernet, an external PHY or SerDes device is

required to complete the interface to the media. Each eTSEC supports multiple standard

media-independent interfaces. Multiple eTSECs are available, providing flexible options for connectivity

and control access at different speeds.

The eTSEC provides the flexibility to accelerate the identification and retrieval of standard and

non-standard protocols carried over Ethernet, including both IP versions 4 and 6 and TCP/UDP.

CPU-intensive parsing and checksum operations can be optionally off-loaded to an eTSEC to accelerate

existing TCP/IP stacks. On transmission, varying fractions of link bandwidth can be allocated to each of

multiple transmit queues through a modified weighted round-robin scheduler. On receive, an arbitrary set

of queue selection rules can be programmed into each eTSEC to implement flexible quality of service or

firewall strategies based on high-level protocol identification. Without enabling these advanced features,

each eTSEC emulates a PowerQUICC II Pro TSEC, allowing existing driver software to be re-used with

minimal change. Each eTSEC is organized as shown in

The eTSECs do not support TBI, GMII, and FIFO operating modes, so all

references to these interfaces and features should be ignored for this device.

MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3

Freescale Semiconductor

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