Freescale Semiconductor MPC8313E Family Reference Manual page 908

Enhanced Three-Speed Ethernet Controllers
For the Rx descriptor controller to determine the number of free BDs remaining in the ring, it needs to
know the following:
1. The location of the current BD being used by hardware
2. The location of the last BD that was released (freed) by software
3. The length of the Rx BD ring.
For each active ring, the current BD pointer (RBPTRn) is maintained by the eTSEC. Software knows both
the size of the Rx ring and the location of the last freed BD. By providing the eTSEC with those values
(through RQPRM[LEN] and RFBPTR respectively) the eTSEC always know how many receive buffers
are available to be consumed by incoming data.
The number of guaranteed free BDs in the ring is then determined by:
When RFBPTRn < RBPTRn
When RFBPTRn > RBPTRn
When RBPTRn = RFBPTRn the number of free BDs in the ring is either one (since RFBPTRn points to a
free BD) or equal to the ring length. Since the BD pointed to by RBPTRn may be either in use or about to
be used, it is not considered in the free BD count. To resolve the case where the two pointers collide, the
following logic applies:
If RBASEn was updated and thus initializes both RBPTRn and RFBPTRn, the ring is deemed empty.
If RFBPTRn is updated by a software write and matches RBPTRn, the ring is deemed empty.
If HW updates RBPTRn and the result matches RFBPTRn, the ring is deemed to have one BD remaining.
Upon writing this BD back to memory (indicating the buffer is occupied) the ring is deemed to be full.
Important. There is a possibility that if software is severely backlogged in updating RFBPTRn, the
hardware could wrap around the ring entirely, consume exactly the remaining number of BDs and not halt
with a BSY error. If software then increments RFBPTRn to the next address (thereby equalling RBPTRn),
the hardware assumes the ring is now empty (when in fact there is only a single BD freed up). This results
in the hardware failing to maintain back pressure on the far end. Upon software incrementing RFBPTRn
a subsequent time, the wrap condition is successfully detected and hardware recognizes a nearly full ring
(rather than a nearly empty one). Since software can increment RFBPTRn by any amount, it is not possible
for hardware to determine in this case whether the user has cleared the entire ring or just one BD. Users
can eliminate the possibility of this condition occurring by ensuring that RFBPTRn is incremented by at
least two BDs each time (that is, clear at least two buffers whenever the RxBD unload routine is called).
Once the eTSEC determines that this threshold has been reached, back pressure is applied accordingly. The
type of back pressure that is applied varies according to the physical interface that is used.
• Half duplex Ethernet: No support in this mode.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
15-178
[
FreeBDs = RQPRMn LEN
FreeBDs = RFBPTRn RBPTRn
] RBPTRn
– + RFBPTRn
–
Freescale Semiconductor