Freescale Semiconductor MPC8313E Family Reference Manual page 1198

Powerquicc ii pro integrated processor
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Revision History
15.5.3.2.1, 15-37
15.5.3.2.4, 15-42
15.5.3.3.3, 15-52
15.5.3.3.7, 15-57
15.5.3.3.8, 15-60
15.5.3.5.1, 15-68
15.5.3.5.2, 15-69
Frame type
Receive or transmit
Receive
Transmit
Receive or transmit
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
A-20
In Table 15-15, "TCTRL Field Descriptions," change TCTRL[TXSCHED] field
description for "01" state to read as follows:
"01 Priority scheduling mode. Frames from enabled TxBD rings are serviced in
ascending ring index order."
In Table 15-18, "TXIC Field Descriptions," remove references to CCB clock.
In Table 15-29, "RXIC Field Descriptions," remove references to CCB clock.
In Table 15-33, "RQFCR Field Descriptions," update AND bit field description
(bit 24) to read as follows:
"AND, in combination with CLE, REJ, and PID match, determines whether the
filer will accept or reject a frame, defer evaluation until the next rule, exit a cluster,
or skip a rule or set of rules.
If CLE is zero:
0
Match property[PID] against RQPROP. If matched, accept or reject frame
based on REJ. Otherwise skip to next rule.
1
Match property[PID] against RQPROP. If matched, defer evaluation to next
rule. Otherwise, skip all rules up to and including the next rule with AND = 0.
If the next rule with AND = 0 has CLE = 1, then also exit cluster.
If CLE is one:
0
Match property[PID] against RQPROP. If matched, accept or reject frame
based on REJ. Otherwise, exit cluster.
1
Match property[PID] against RQPROP. If matched, enter cluster. Otherwise,
skip all rules up to and including the next rule while CLE = 1 and AND = 0."
In Table 15-34, "RQFPR Field Descriptions," append the following to the TOS
field description (PID=1010, bits 24–31):
"(Software should acknowledge the PIC=1 IP6 bit to distinguish proper alignment
of the TOS field.)"
In Table 15-40, "MACCFG1 Field Descriptions," add the following note to
Tx_Flow and Rx_Flow:
"Note: Should not be set when operating in Half-Duplex mode"
In Table 15-41, "MACCFG2 Field Descriptions," in the MACCFG2[Huge Frame]
(bit 26) field description, replace the right-hand "Buffer descriptor updated"
column as follows:
Frame length
> maximum frame length
= maximum frame length
= maximum frame length
< maximum frame length
Packet
Buffer descriptor
truncation
updated
yes
yes
no
no
no
yes
no
no
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