Transmit Multicast Packet Counter (Tmca); Transmit Broadcast Packet Counter (Tbca) - Freescale Semiconductor MPC8313E Family Reference Manual

15.5.3.6.27 Transmit Multicast Packet Counter (TMCA)

Figure 15-79 describes the definition for the TMCA register.
Offset eTSEC1:0x2_46E8; eTSEC2:0x2_56E8
0
R
W
Reset
Figure 15-79. Transmit Multicast Packet Counter Register Definition
Table 15-83 describes the fields of the TMCA register.
Bits Name
0–9 — Reserved
10–31 TMCA Transmit multicast packet counter. Increments for each multicast valid frame transmitted (excluding broadcast
frames) with valid CRC and of lengths 64 to 1518 (non VLAN) or 1522 (VLAN).

15.5.3.6.28 Transmit Broadcast Packet Counter (TBCA)

Figure 15-80 describes the definition for the TBCA register.
Offset eTSEC1:0x2_46EC; eTSEC2:0x2_56EC
0
R
W
Reset
Figure 15-80. Transmit Broadcast Packet Counter Register Definition
Table 15-84 describes the fields of the TBCA register.
Bits Name
0–9 — Reserved
10–31 TBCA Transmit broadcast packet counter. Increments for each broadcast frame transmitted (excluding multicast
frames) with valid CRC and of lengths 64 to 1518 (non VLAN) or 1522 (VLAN).
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
9 10
—
Table 15-83. TMCA Field Descriptions
9 10
—
Table 15-84. TBCA Field Descriptions
Enhanced Three-Speed Ethernet Controllers
TMCA
All zeros
Description
TBCA
All zeros
Description
Access: Read/Write
31
Access: Read/Write
31
15-93