On-The-Go Status And Control (Otgsc)—Non-Ehci - Freescale Semiconductor MPC8313E Family Reference Manual

Powerquicc ii pro integrated processor
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Bits
Name
2
PE
Port enabled/disabled.
Host mode:
• Ports can only be enabled by the controller as a part of the reset and enable. Software cannot enable a port
by writing a one to this field. Ports can be disabled by either a fault condition (disconnect event or other fault
condition) or by the host software. Note that the bit status does not change until the port state actually
changes. There may be a delay in disabling or enabling a port due to other host and bus events.
• When the port is disabled, (0) downstream propagation of data is blocked except for reset.
• This field is zero if Port Power(PP) is zero in host mode.
Device mode:
• The device port is always enabled. (This bit is one.)
1
CSC
Connect change status.
Host mode:
• This bit indicates a change has occurred in the port's Current Connect Status. the controller sets this bit for
all changes to the port device connect status, even if system software has not cleared an existing connect
status change. For example, the insertion status changes twice before system software has cleared the
changed condition, hub hardware is 'setting' an already-set bit (that is, the bit will remain set). Software
clears this bit by writing a one to it.
1 Connect Status has changed.
0 No change.
• This field is zero if Port Power(PP) is zero.
Device mode:
• This bit is undefined.
0
CCS
Current connect status.
Host mode:
1 Device is present
0 No device present.
This field is zero if Port Power(PP) is zero in host mode.
In device mode:
1 Attached
0 Not attached.
A one indicates that the device successfully attached and is operating in either high-speed or full-speed as
indicated by the PSPD field in this register. A zero indicates that the device did not attach successfully or was
forcibly disconnected by the software writing a zero to USBCMD[RS] (run bit). It does not state the device being
disconnected or suspended.
16.3.2.15 On-The-Go Status and Control (OTGSC)—Non-EHCI
This register is not defined in the EHCI specification. The USB DR module implements one On-The-Go
(OTG) status and control register corresponding to Port 0.
The OTGSC register has four sections:
OTG interrupt enables (Read/Write)
OTG interrupt status (Read/Write to Clear)
OTG status inputs (Read Only)
OTG controls (Read/Write)
The status inputs are de-bounced using a 1-msec time constant. Values on the status inputs that do not
persist for more than 1 msec will not cause an update of the status inputs, or cause and OTG interrupt.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Table 16-23. PORTSC Register Field Descriptions (continued)
Description
Universal Serial Bus Interface
16-31

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