Freescale Semiconductor MPC8313E Family Reference Manual page 735

• 10- and 100-Mbps MII interface operation
The MAC–PHY interface operates in MII mode by setting MACCFG2[I/F Mode] = 01. The MII
is the media-independent interface defined by the 802.3 standard for 10/100 Mbps operation. The
speed of operation is determined by the TSECn_TX_CLK and TSECn_RX_CLK signals, which
are driven by the transceiver. The transceiver either auto-negotiates the speed, or it may be
controlled by software using the serial management interface (MDC/MDIO signals) to the
transceiver.
Clause 22.2.4 of the IEEE 802.3 specification describes the MII management interface.
• 10- and 100-Mbps RMII interface operation
The RMII is the reduced media-independent interface defined by the RMII Consortium (March
1998) for 10/100 Mbps operation. The speed of operation is determined by the TSECn_TX_CLK
signal, which is driven by the transceiver.
• MAC address recognition options
The options supported are promiscuous, broadcast, exact unicast address match, exact unicast
virtual address match to support router redundancy, and multicast hash match. For detailed
descriptions refer to
eTSEC supports automatic LAN-initiated wake-up during power management through the AMD
Magic Packet protocol, as described in
• Receive frame parsing options
Frame parsing options are to disable parsing (no TCP/IP off-load), IP header parsing, and TCP or
UDP parsing. Parsing must be enabled to make use of receive queue filing algorithms. The options
are detailed in
• Receive queue selection options
Received frames are by default sent to a single buffer descriptor ring. If multiple receive queues
are enabled, a receive queue filer can be programmed with selection criteria to differentiate
received frames and file them to different buffer descriptor rings. See
Service (QoS) Provision,"
• TCP/IP transmit options
Frames for transmission may be sent as-is, with IP header processing, or TCP header processing.
The transmit buffer descriptors, described in
(TxBD)," enable these options and operate with parameters prepended to frame buffers, as
described in Section 15.6.3, "TCP/IP Off-Load."
• Transmit queue selection options
The options supported are single transmit queue, priority-based queue selection, and modified
weighted round-robin queueing. These options are described further in
"Transmit Control Register (TCTRL)."
• RMON support
Standard Ethernet interface management information base (MIBs) can be generated through the
RMON MIB counters.
• Internal loop back supported for all interfaces except when configured for half-duplex operation
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Section 15.6.2.7, "Frame Recognition."
Section 15.6.3, "TCP/IP Off-Load."
for detailed descriptions.
Section 15.6.2.8, "Magic Packet Mode."
Section 15.6.7.2, "Transmit Data Buffer Descriptors
Enhanced Three-Speed Ethernet Controllers
Section 15.6.4, "Quality of
Section 15.5.3.2.1,
15-5