Data Structures; Operational Model - Freescale Semiconductor MPC8313E Family Reference Manual

Universal Serial Bus Interface
low-speed devices or hubs.
with embedded TT.
Table 16-96. Functional Differences Between EHCI and EHCI with Embedded TT
Standard EHCI
After port enable bit is set following a connection and
reset sequence, the device/hub is assumed to be HS.
FS and LS devices are assumed to be downstream
from a HS hub thus, all port-level control is performed
through the Hub Class to the nearest Hub.
FS and LS devices are assumed to be downstream
from a HS hub with HubAddr=X. [where HubAddr > 0
and HubAddr is the address of the Hub where the bus
transitions from HS to FS/LS (that is, Split target hub)]
16.9.1.4

Data Structures

The same data structures used for FS/LS transactions though a HS hub are also used for transactions
through the Root Hub. The following list demonstrates how the Hub Address and Endpoint Speed fields
should be set for directly attached FS/LS devices and hubs:
1. QH (for direct attach FS/LS)—Async. (Bulk/Control Endpoints) Periodic (Interrupt)
• Hub Address = 0
• Transactions to direct attached device/hub.
— QH.EPS = Port Speed
• Transactions to a device downstream from direct attached FS hub.
— QH.EPS = Downstream Device Speed
When QH.EPS = 01 (LS) and PORTSC[PSPD] = 00 (FS), a LS-pre-pid is
sent before the transmitting LS traffic.
Maximum Packet Size must be less than or equal 64 or undefined behavior may result.
2. siTD (for direct attach FS)—Periodic (ISO Endpoint)
• All FS ISO transactions:
— Hub Address = 0
— siTD.EPS = 00 (full speed)
Maximum Packet Size must less than or equal to 1023 or undefined behavior may result.
16.9.1.5

Operational Model

The operational models are well defined for the behavior of the transaction translator (see Universal Serial
Bus Revision 2.0 Specification) and for the EHCI controller moving packets between system memory and
a USB-HS hub. Since the embedded transaction translator exists within the DR module there is no physical
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
16-154
Table 16-96 summarizes the functional differences between EHCI and EHCI
After port enable bit is set following a connection and reset sequence,
the device/hub speed is noted from PORTSC.
FS and LS device can be either downstream from a HS hub or directly
attached. When the FS/LS device is downstream from a HS hub, then
port-level control is done using the Hub Class through the nearest Hub.
When a FS/LS device is directly attached, then port-level control is
accomplished using PORTSC.
FS and LS device can be either downstream from a HS hub with
HubAddr = X [HubAddr > 0] or directly attached [where HubAddr = 0 and
HubAddr is the address of the Root Hub where the bus transitions from
HS to FS/LS (that is, Split target hub is the root hub)]
NOTE
EHCI with Embedded Transaction Translator
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