Complete-Split For Scheduling Boundary Cases 2A, 2B - Freescale Semiconductor MPC8313E Family Reference Manual

Universal Serial Bus Interface

16.6.12.3.6 Complete-Split for Scheduling Boundary Cases 2a, 2b

Boundary cases 2a and 2b (INs only) (see
state context of the previous siTD to finish the split transaction.
state fields.
Total Bytes To Transfer
P (page select)
Current Offset
TP (transaction position)
T-count (transaction count)
TP and T-count are used only for Host to Device (OUT) endpoints.
If software has budgeted the schedule of this data stream with a frame wrap case, then it must initialize the
siTD[Back Pointer] field to reference a valid siTD and have the T bit in the siTD[Back Pointer] field
cleared. Otherwise, software must set the T bit in siTD[Back Pointer]. The host controller's rules for
interpreting when to use the siTD[Back Pointer] field are listed below. These rules apply only when the
siTD's Active bit is a one and the SplitXState is Do Complete Split.
• When cMicroFrameBit is a 0x1 and the siTD
• If cMicroFrameBit is a 0x2 and siTD
When either of these conditions apply, then the host controller must use the transaction state from siTD
In order to access siTD
Pointer].
The host controller must save the entire state from siTD
accommodate for case 2b processing. The host controller must not recursively walk the list of siTD[Back
Pointers].
If siTD is active (Active bit is set and SplitXStat is Do Complete Split), then both Test A and Test B are
X-1
applied as described above. If these criteria to execute a complete-split are met, the host controller executes
the complete split and evaluates the results as described above. The transaction state (see
siTD is appropriately advanced based on the results and written back to memory. If the resultant state
X-1
of siTD 's Active bit is a one, then the host controller returns to the context of siTD
X-1
next pointer to the next schedule item. No updates to siTD
If siTD is active (Active bit is set and SplitXStat is Do Start Split), then the host controller must clear
X-1
the Active bit and set the Missed Micro-Frame status bit and the resultant status is written back to memory.
If siTD 's Active bit is cleared, (because it was cleared when the host controller first visited siTD
X-1
siTD 's back pointer, it transitioned to zero as a result of a detected error, or the results of siTD
X
complete-split transaction cleared it), then the host controller returns to the context of siTD
transitions its SplitXState to Do Start Split. The host controller then determines whether the case 2b start
split boundary condition exists (that is, if cMicroframeBit is 1 and siTD
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
16-118
Figure
Table 16-71. Summary siTD Split Transaction State
Buffer State
All bits in the status field
X
, the host controller reads on-chip the siTD referenced from siTD
X-1
16-57) require that the host controller use the transaction
Table 16-71
Status
C-prog-mask
NOTE
[Back Pointer] T-bit is zero, or
X
[S-mask[0]] is zero
while processing siTD
X
are necessary.
X
enumerates the transaction
Execution Progress
. This is to
X-1
Table
, and follows its
X
X
[S-mask[0]] is 1). If this criterion
X
Freescale Semiconductor
.
X-1
[Back
X
16-71) of
via
X-1
's
X-1
and