Transmit Data Buffer Descriptors (Txbd) - Freescale Semiconductor MPC8313E Family Reference Manual

Powerquicc ii pro integrated processor
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Enhanced Three-Speed Ethernet Controllers
15.6.7.2

Transmit Data Buffer Descriptors (TxBD)

Data is presented to the eTSEC for transmission by arranging it in memory buffers referenced by the
TxBDs. In the TxBD the user initializes the R, PAD, W, I, L, TC, PRE, HFE, CF, and TOE bits and the
length (in bytes) in the first word, and the buffer pointer in the second word. Unused fields or fields written
by the eTSEC must be initialized to zero.
The eTSEC clears the R bit in the first word of the BD after it finishes using the data buffer. The transfer
status bits are then updated. Additional transmit frame status can be found in statistic counters in the MIB
block.
Software must expect eTSEC to prefetch multiple TxBDs, and for TCP/IP checksumming an entire frame
must be read from memory before a checksum can be computed. Accordingly, the R bit of the first TxBD
in a frame must not be set until at least one entire frame can be fetched from this TxBD onwards. If eTSEC
prefetches TxBDs and fails to reach a last TxBD (with bit L set), it halts further transmission from the
current TxBD ring and report an underrun error as IEVENT[XFUN]; this indicates that an incomplete
frame was fetched, but remained unprocessed. The relevant TBPTR register points to the next unread
TxBD following the error.
Figure 15-149
defines the TxBD.
0
1
Offset + 0
R
PAD/CRC
Offset + 2
Offset + 4
Offset + 6
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
15-188
Beginning BD pointer
0
4
W = 1
Figure 15-148. Buffer Descriptor Ring
2
3
4
5
6
W
I
L
TC
PRE/DEF
TX DATA BUFFER POINTER
Figure 15-149. Transmit Buffer Descriptor
1
2
3
7
8
9
0
HFE/LC CF/RL
DATA LENGTH
10
11
12
13
14
RC
TOE/UN
Freescale Semiconductor
15
TR

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