Timer Drift Compensation Addend Register (Tmr_Add) - Freescale Semiconductor MPC8313E Family Reference Manual

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Table 15-117 describes the fields of the TMR_CNT_H/L register.
Bits Name
0–63 TMR_CNT_ Value of the current time counter. Current time is calculated by adding TMROFF_H/L with the
H/L TMR_CNT_H/L counter. This register can be written through the register writes.Writes to the
TMR_CNT_L register copies the written value into the shadow TMR_CNT_L register. Writes to the
TMR_CNT_H register copies the values written into the shadow TMR_CNT_H register. Contents of the
shadow registers are copied into the TMR_CNT_L and TMR_CNT_H registers following a write into
the TMR_CNT_H register. Writes to these registers have precedence over the timer increment. The
user must write to TMR_CNT_L register first.
Reads from the TMR_CNT_L register copies the entire 64-bit clock time of the read enable into the
TMR_CNT_H/L shadow registers. Read instruction from the TMR_CNT_H register reads the value
stored in the TMR_CNT_H shadow register. The user must read the TMR_CNT_L register first to get
correct 64-bit TMR_CNT_H/L counter values.

15.5.3.10.8 Timer Drift Compensation Addend Register (TMR_ADD)

Timer drift compensation addend register (TMR_ADD) is used to hold timer frequency compensation
value (FreqCompensationValue). The nominal frequency of the clock counter is determined by the
FreqDivRatio and the clock frequency (FreqClock). This register is programmed with 2
Frequency division ratio (FreqDivRatio) is the ratio between the frequency of the oscillator (TimerOsc)
and the desired clock frequency (NominalFreq). FreqDivRatio is a design constant chosen to be greater
than 1.0001. The ADDEND value is added to the 32-bit accumulator register at every rising edge of the
oscillator clock (TimerOsc). The clock counter is incremented at every carry pulse of the accumulator.
Only one of this register is required for the entire group of eTSECs.
of the TMR_ADD register.
Offset eTSEC1:0x2_4E20
0
R
W
Reset
Table 15-118 describes the fields of the TMR_ADD register fields for the timer.
Bits Name
0–31 ADDEND
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
15-118
Table 15-117. TMR_CNT_H/L Register Field Descriptions
Figure 15-112. TMR_ADD Register Definition
Table 15-118. TMR_ADD Register Field Descriptions
Timer drift compensation addend register value. It is programmed with a value of 2^32/FreqDivRatio.
For example,
TimerOsc = 50 MHz
NominalFreq = 40 MHz
FreqDivRatio = 1.25
ADDEND = ceil(2^32/1.25) = 0xCCCC_CCCD
Description
Figure 15-112
ADDEND
All zeros
Description
32
/FreqDivRatio.
describes the definition
Access: Read/Write
31
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