Freescale Semiconductor MPC8313E Family Reference Manual page 1219

4.3.2.2, 4-14
4.3.2.2.4, 4-17
4.3.2.2.4, 4-17
RCWHR Field
Bits Name
9–11 ROMLOC
4.3.3.1.1, 4-23
4.4.4, 4-32
4.4.7, 4-32
4.5.1, 4-33
4.5.1.6, 4-37
4.5.2, 4-38
Chapter 5, Throughout Added that LBLAWAR0[EN], PCILAWAR[EN], and DDRLAWAR[EN] are
5.3.2.3.1, 5-18
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
In Table 4-11, in the Description column for bits 9–11, added a sentence after the
first sentence as follows:
This bit combined with bit RLEXT determines where the device boots from.
Second paragraph, first sentence, was changed to read as follows:
The boot ROM location reset configuration word field, shown in Table 4-5,
establishes the location of boot ROM.
Combined Table 4-15 and Table 4-16, creating a new Table 4-15 as follows:
Table 4-15. Boot ROM Location
Value
(Binary)
Legacy Mode (RLEXT = 00)
000 DDR SDRAM
001 PCI
010 Reserved, should be cleared
011 Reserved, should be cleared
100 Reserved
101 Local bus GPCM—8-bit ROM
110 Local bus GPCM—16-bit ROM
111 Reserved
Deleted Table 4-16 and renumbered the rest of the tables in the chapter.
In Table 4-23, in the NOR Flash row, changed the setting for BR0[PS] to 10.
Second paragraph, last sentence, changed to read as follows:
When using the single crystal option, the frequency for SYS_CLK_IN must be
chosen such that the USB reference will be 24 or 48 MHz when utilizing the
divide by 1 or 2 option, that is, the SYS_CLK_IN must be 24 or 48 MHz.
Removed Section 4.4.7, "Clock Summary," and Table 4-28. Renumbered the rest
of the tables in the chapter.
In Table 4-29, added a 'Reset' column.
In Table 4-33, bit 31, changed the description to read as follows:
Reserved, this bit should never be set.
In Table 4-35, added a 'Reset' column.
dependent on RCWH[ROMLOC] and RCWH[RLEXT].
In Table 5-25, "REVID Coding," updated REVID to 2.1
Meaning
NAND Flash Mode (RLEXT = 01)
Reserved
Local bus NAND Flash—8-bit small page ROM
Reserved
Reserved
Reserved
Local bus NAND Flash—8-bit large page ROM
Reserved
Reserved
Revision History
A-41