Spi Mode Register (Spmode) - Freescale Semiconductor MPC8313E Family Reference Manual

Offset
0x000–0x01F Reserved
0x020

SPI mode register (SPMODE)

0x024 SPI event register (SPIE)
0x028 SPI mask register (SPIM)
0x02C SPI command register (SPCOM)
0x030 SPI transmit register (SPITD)
0x034 SPI receive register (SPIRD)
0x038–0xFFF Reserved
19.4.1 Register Descriptions
19.4.1.1 SPI Mode Register (SPMODE)
SPMODE, shown in Figure
Offset 0x020
0 1 2 3
R
— LOOP CI CP DIV16 REV M/S EN
W
Reset
Table 19-4 describes the SPMODE fields.
Bits Name
0 — Reserved
1 LOOP Loop mode. Enables local loopback operation.
0 Normal operation.
1 Loopback mode. Used to test the SPI controller internal functionality, the transmitter output is internally
connected to the receiver input. The receiver and transmitter operate normally, except that received data
is ignored.
The SPI acts normally in loop back mode; therefore, negating SPISEL in slave mode stops transmission,
negating it in master mode and causing an MME error.
2 CI Clock invert. Inverts SPI clock polarity. See
0 The inactive state of SPICLK is low.
1 The inactive state of SPICLK is high.
3 CP Clock phase. Selects the transfer format. See
0 SPICLK starts toggling at the middle of the data transfer.
1 SPICLK starts toggling at the beginning of the data transfer.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Table 19-3. SPI Register Summary
Register
19-4, controls both the SPI operation mode and clock source.
4 5 6 7 8
LEN
Figure 19-4. SPMODE-SPI Mode Register Definition
Table 19-4. SPMODE Field Descriptions
Access
—
R/W
Mixed
R/W
W
W
R
—
11 12 15 16 18 19
PM — OD
All zeros
Description
Figure 19-5 and Figure 19-6
Figure 19-5 and Figure 19-6
Serial Peripheral Interface
Reset Value Section/Page
—
All zeros 19.4.1.1/1919-9
All zeros 19.4.1.2/1919-12
All zeros 19.4.1.3/1919-13
All zeros 19.4.1.4/1919-14
All zeros 19.4.1.5/1919-14
0xFFFF_FFFF 19.4.1.6/1919-15
—
Access: Read/write
20
—
for more information.
for more information.
—
—
31
19-9