Freescale Semiconductor MPC8313E Family Reference Manual page 1059

The complete-split transaction encounters a Timeout, CRC16 failure, and so on. The siTD[Status]
field XactErr field is set and the complete-split transaction must be retried immediately. The host
controller must use an internal error counter to count the number of retries as a counter field is not
provided in the siTD data structure. The host controller will not retry more than two times. If the
host controller exhausts the retries or the end of the microframe occurs, the Active bit is cleared.
• DATAx (0 or 1)
This response signals that the final data for the split transaction has arrived. The transfer state of
the siTD is advanced and the Active bit is cleared. If the Bytes To Transfer field has not
decremented to zero (including the reception of the data payload in the DATAx response), then less
data than was expected, or allowed for was actually received. This short packet event does not set
the USB interrupt status bit (USBSTS[UI]) to a one. The host controller will not detect this
condition.
• NYET (and Last)
On each NYET response, the host controller also checks to determine whether this is the last
complete-split for this split transaction. Last was defined in
Interrupt—Do-Complete-Split."
transfer state of the siTD is not advanced (never received any data) and the Active bit is cleared.
No bits are set in the Status field because this is essentially a skipped transaction. The transaction
translator must have responded to all the scheduled complete-splits with NYETs, meaning that the
start-split issued by the host controller was not received. This result should be interpreted by
system software as if the transaction was completely skipped. The test for whether this is the last
complete split can be performed by XORing C-mask with C-prog-mask. A zero result indicates
that all complete-splits have been executed.
• MDATA (and Last)
See above description for testing for Last. This can only occur when there is an error condition.
Either there has been a babble condition on the full-speed link, which delayed the completion of
the full-speed transaction, or software set up the S-mask and/or C-masks incorrectly. The host
controller must set the XactErr bit and clear the Active bit.
• NYET (and not Last)
See above description for testing for Last. The complete-split transaction received a NYET
response from the transaction translator. Do not update any transfer state (except for C-prog-mask)
and stay in this state.
• MDATA (and not Last)
The transaction translator responds with an MDATA when it has partial data for the split
transaction. For example, the full-speed transaction data payload spans from microframe X to X+1
and during microframe X, the transaction translator responds with an MDATA and the data
accumulated up to the end of microframe X. The host controller advances the transfer state to
reflect the number of bytes received.
If Test A succeeds, but Test B fails, it means that one or more of the complete-splits have been skipped.
The host controller sets the Missed Micro-Frame status bit and clears the Active bit.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
If it is the last complete-split (with a NYET response), then the
Universal Serial Bus Interface
Section 16.6.12.2.7, "Periodic
16-117