Freescale Semiconductor MPC8313E Family Reference Manual page 1196

Revision History
15.5.3.1.3, 15-26
15.5.3.1.6, 15-31
Bits Name
17 CLRCNT Clear all statistics counters and carry registers.
0 Allow MIB counters to continue to increment and keep any overflow indicators.
1 Reset all MIB counters and CAR1 and CAR2.
This bit is self-resetting.
18 AUTOZ Automatically zero MIB counter values and carry registers.
0 The user must write the addressed counter zero after a host read.
1 The addressed counter value is automatically cleared to zero after a host read.
This is a steady state signal and must be set prior to enabling the Ethernet controller and must not be
changed without proper care.
25 GMIIM GMII interface mode. Not supported.
26 TBIM (Reduced) ten-bit interface mode. If this bit is set, reduced ten-bit interface (RTBI) mode is enabled. This
bit can be pin-configured at reset to set or clear. See
0 MII or RMII mode interface
1 RTBI mode interface
29 RMM Reduced-pin mode for 10/100 interfaces. If this bit is set, an RMII pin interface is expected. RMM must
be 0 if RPM = 1. This register can be pin-configured at reset to 0 or 1
0 Non-RMII interface mode
1 RMII interface mode
15.5.3.1.6, 15-32
Interface Mode
MII 10/100 Mbps
RMII 100 Mbps
RMII 10 Mbps
RGMII 1Gbps
RGMII 100 Mbps
RGMII 10 Mbps
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
A-18
In Table 15-8, "IEVENT Field Descriptions," replace the third sentence of the
IEVENT[CRL] (bit 14) field description
"The frame is discarded without being transmitted and transmission of the next
frame commences."
with the following:
"The frame is discarded without being transmitted and the queue halts
(TSTAT[THLTn] set to 1)."
In Figure 15-7, "ECNTRL Register Definitions," and Table 15-11, made bit 16
reserved.
In addition, modify the descriptions for the following bits:
Update Table 15-12, "eTSEC Interface Configurations," as follows:
Table 13-30. eTSEC Interface Configurations
1 2
FIFM GMIIM TBIM
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
Description
Section 4.3.2, "Reset Configuration Words."
ECNTRL Field
RPM R100M
0 0
0 1
0 0
1 0
1 1
1 0
MACCFG2 Field
RMM SGMIIM
0 0
1 0
1 0
0 0
0 0
0 0
Freescale Semiconductor
I/F Mode
01
01
01
10
01
01