Upm Refresh Timer (Lurt) - Freescale Semiconductor MPC8313E Family Reference Manual

Enhanced Local Bus Controller
behavior of eLBC is unpredictable if special operation modes are altered between LSOR being written and
the relevant memory controller completing that access.
UPM special operation modes are set in registers MxMR[OP], see
Registers (MxMR)." FCM special operation modes are set in FMR[OP], see
Mode Register (FMR)."
performing a dummy access to a bank associated with the controller in question, but use of LSOR avoids
changing settings for the address space occupied by the bank. More details of special operation sequences
appear in Section 10.4.4.2.1, "UPM Programming Example (Two Sequential Writes to the RAM Array)."
Offset 0x090
0
R
W
Reset
Table 10-14 describes LSOR.
Bits Name
0–28 — Reserved
BANK Bank on which a special operation is initiated. If the bank identified by BANK is marked valid (BR n [V] set) and
29–31
the bank is controlled by a memory controller whose current mode OP is non-zero—or a special
operation—eLBC will request the special operation to be activated on the selected bank when this field is
written. Otherwise, writing this field has no effect.
000 Bank 0 is triggered for special operation
...
011 Bank 3 is triggered for special operation
100–111Reserved
10.3.1.8

UPM Refresh Timer (LURT)

The UPM refresh timer (LURT), shown in
selected a UPM machine and are refresh-enabled (MxMR[RFEN] = 1). Each time the timer expires, a
qualified bank generates a refresh request using the selected UPM. The qualified banks rotate their
requests.
Offset 0x0A0
0
R
LURT
W
Reset
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
10-24
Writing LSOR has the same effect as setting a special controller mode and
Figure 10-11. Special Operation Initiation Register (LSOR)
Table 10-14. LSOR Field Description
Figure
7 8
Figure 10-12. UPM Refresh Timer (LURT)
Section 10.3.1.4, "UPM Mode
—
All zeros
Description
10-12, generates a refresh request for all valid banks that
—
All zeros
Section 10.3.1.17, "Flash
Access: Read/Write
28 29
BANK
Access: Read/Write
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31
31