Enhanced Three-Speed Ethernet Controllers
15.5.3.6.41 Transmit Oversize Frame Counter (TOVR)
Figure 15-93
describes the definition for the TOVR register.
Offset eTSEC1:0x2_4724; eTSEC2:0x2_5724
0
R
W
Reset
Figure 15-93. Transmit Oversized Frame Counter Register Definition
Table 15-97
describes the fields of the TOVR register.
Bits
Name
0–19
—
Reserved
20–31
TOVR
Transmit oversize frame counter. Increments each time a frame is transmitted which exceeds
1518 bytes (non VLAN) or 1522 bytes (VLAN) with a correct FCS value.
15.5.3.6.42 Transmit Undersize Frame Counter (TUND)
Figure 15-94
describes the definition for the TUND register.
Offset eTSEC1:0x2_4728; eTSEC2:0x2_5728
0
R
W
Reset
Figure 15-94. Transmit Undersize Frame Counter Register Definition
Table 15-98
describes the fields of the TUND register.
Bits
Name
0–19
—
Reserved
20–31
TUND
Transmit undersize frame counter. Increments for every frame less then 64 bytes, with a correct FCS
value.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
15-100
—
All zeros
Table 15-97. TOVR Field Descriptions
Description
—
All zeros
Table 15-98. TUND Field Descriptions
Description
Access: Read/Write
19 20
TOVR
Access: Read/Write
19 20
TUND
Freescale Semiconductor
31
31