Pmc Memory Map/Register Definition - Freescale Semiconductor MPC8313E Family Reference Manual

Powerquicc ii pro integrated processor
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5.8.1
External Signal Description
Table 5-64
describes the power management signals.
Table 5-64. System Control Signals—Detailed Signal Descriptions
Signal
I/O
QUIESCE
O
Quiesce state. Indicates that the processor system and PowerPC core are in low power state.
State
Meaning
Timing The timing between a quiesce request from the PowerPC core and the assertion of the external
EXT_PWR_
O
External power control. Enables the external switch to provide power to the device.
CTRL
State
Meaning
Timing —
PMC_PWR_
I
Stable power. Indicates whether the power supply on the board is stable.
OK
State
Meaning
Timing —
5.8.2

PMC Memory Map/Register Definition

Table 5-65
shows the memory map for the power management controller registers.
Table 5-65. Power Management Controller Registers Memory Map
Offset
0x00B00
Power management controller configuration register (PMCCR)
0x00B04
Power management controller event register (PMCER)
0x00B08
Power management controller mask register (PMCMR)
0x00B0C
Power management controller configuration register 1 (PMCCR1)
0x00B10
Power management controller configuration register 2 (PMCCR2)
0x00B14–
Reserved
0x00BFC
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Asserted—The system and PowerPC core are in low power state.
Negated—The system and PowerPC core are not in low power state.
indication or between negation of the core's quiesce request and negation of the external
indication depends on the current state of the internal system units and may vary accordingly.
Asserted—Power is supplied to the switchable power supply.
Negated—Power is removed from the switchable power supply.
Asserted—The external power supply is stable to specifications.
Negated—The external power supply is off or not stable to specifications.
Register
Description
Access
R/W
R/W
R/W
R/W
R/W
System Configuration
Reset
Section/Page
0x0000_0000
5.8.2.1/5-68
0x0000_0000
5.8.2.2/5-68
0x0000_0000
5.8.2.3/5-70
0x0000_0000
5.8.2.4/5-71
0x0002_0002
5.8.2.5/5-73
5-67

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