Receive Multicast Packet Counter (Rmca); Receive Broadcast Packet Counter (Rbca) - Freescale Semiconductor MPC8313E Family Reference Manual

Table 15-66 describes the fields of the RFCS register.
Bits Name
0–15 — Reserved
16–31 RFCS Receive FCS error counter. In Ethernet mode, increments for each frame received that has an integral
64–1518 length and contains a frame check sequence error.
15.5.3.6.11

Receive Multicast Packet Counter (RMCA)

Figure 15-63 describes the definition for the RMCA register.
Offset eTSEC1:0x2_46A8; eTSEC2:0x2_56A8
0
R
W
Reset
Figure 15-63. Receive Multicast Packet Counter Register Definition
Table 15-67 describes the fields of the RMCA register.
Bits Name
0–9 — Reserved
10–31 RMCA Receive multicast packet counter. Increments for each multicast frame with valid CRC and of lengths 64 to
1518 (non VLAN) or 1522 (VLAN), excluding broadcast frames. This count does not include range/length
errors.

15.5.3.6.12 Receive Broadcast Packet Counter (RBCA)

Figure 15-64 describes the definition for the RBCA register.
Offset eTSEC1:0x2_46AC; eTSEC2:0x2_56AC
0
R
W
Reset
Figure 15-64. Receive Broadcast Packet Counter Register Definition
Table 15-68 describes the fields of the RBCA register.
Bits Name
0–9 — Reserved
10–31 RBCA Receive broadcast packet counter. Increments for each broadcast frame with valid CRC and of lengths 64
to 1518 (non VLAN) or 1522 (VLAN), excluding multicast frames. Does not include range/length errors.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Table 15-66. RFCS Field Descriptions
9 10
—
Table 15-67. RMCA Field Descriptions
9 10
—
Table 15-68. RBCA Field Descriptions
Enhanced Three-Speed Ethernet Controllers
Description
RMCA
All zeros
Description
RBCA
All zeros
Description
Access: Read/Write
31
Access: Read/Write
31
15-85