C Interfaces - Freescale Semiconductor MPC8313E Family Reference Manual

Chapter 17
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I

C Interfaces

This chapter describes the two inter-IC (IIC or I
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for most intents, the I
necessary, differences between the two controllers are noted.
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17.1 I C Introduction
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The inter-IC (IIC or I C) bus is a two-wire—serial data (SDA) and serial clock (SCL)—bidirectional serial
bus that provides a simple, efficient method of data exchange between this device and other devices, such
as microcontrollers, EEPROMs, real-time clock devices, A/D converters, and LCDs.
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block diagram of the I
I2CDSRR
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The two-wire I C bus minimizes interconnections between devices. The synchronous, multiple-master I
bus allows the connection of additional devices to the bus for expansion and system development. The bus
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
C interfaces are identical and are described as a single generic controller. Where
C interface.
Address and Control
Addr Decode
I2CADR I2CFDR
Clock
and
Control
Input Sync
and
Digital Filter
SDA SCL
Figure 17-1. I
2
C) bus interfaces implemented on this device. Note that
Interrupt
I2CCR I2CSR
START/
STOP/
Repeated
START
and
Arbitration
Control
arb_lost
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C Block Diagram
Figure 17-1
Data
Data Mux
I2CDR
In/Out Data
Shift Register
Address
Compare
shows a
2
C
17-1