Freescale Semiconductor MPC8313E Family Reference Manual page 1023

Figure 16-48 illustrates the simple model of how a client buffer is mapped by system software to the
periodic schedule (that is, the periodic frame list and a set of iTDs).
Frame List
Frame i
Frame i+1
Frame i+2
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•
Frame i+n
Figure 16-48. Example Association of iTDs to Client Request Buffer
On the right is the client description of its request. The description includes a buffer base address plus
additional annotations to identify which portions of the buffer should be used with each bus transaction.
In the middle is the iTD data structures used by the system software to service the client request. Each iTD
can be initialized to service up to 24 transactions, organized into eight groups of up to three transactions
each. Each group maps to one microframe's worth of transactions. The EHCI controller does not provide
per transaction results within a microframe. It treats the per microframe transactions as a single logical
transfer.
On the left is the host controller's frame list. System software establishes references from the appropriate
locations in the frame list to each of the appropriate iTDs. If the buffer is large, system software can use a
small set of iTDs to service the entire buffer. System software can activate the transaction description
records (contained in each iTD) in any pattern required for the particular data stream.
As noted above, the client request includes a pointer to the base of the buffer and offsets into the buffer to
annotate which buffer sections are to be used on each bus transaction that occurs on this endpoint. System
software must initialize each transaction description in an iTD to ensure it uses the correct portion of the
client buffer. For example, for each transaction description, the PG field is set to index the correct physical
buffer page pointer and the Transaction Offset field is set relative to the correct buffer pointer page (for
example, the same one referenced by the PG field). When the host controller executes a transaction it
selects a transaction description record based on FRINDEX[2–0]. It then uses the current Page Buffer
Pointer (as selected by the PG field) and concatenates to the transaction offset field. The result is a starting
buffer address for the transaction. As the host controller moves data for the transaction, it must watch for
a page wrap condition and properly advance to the next available Page Buffer Pointer. System software
must not use the Page 6 buffer pointer in a transaction description where the length of the transfer will wrap
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
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iTD
0
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iTD •
1
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iTD
N
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Universal Serial Bus Interface
Client Buffer
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Client
Request
USB
Transaction
Information
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