Status Register (Sr) - Freescale Semiconductor MPC8313E Family Reference Manual

Powerquicc ii pro integrated processor
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15.5.4.3.2

Status Register (SR)

Figure 15-120
describes the definition for the SR register.
Offset 0x01
0
R
W
Reset 0
0
0
0
0
Table 15-127
describes the fields of the SR register.
Bits
Name
0–6
Reserved, should be cleared.
7
Extend
This bit indicates that PHY status information is also contained in the Register 15, Extended Status Register.
Status
Returns 1 on read. This bit is read-only.
8
Reserved, should be cleared.
9
No
MF preamble suppression enable. This bit indicates whether or not the PHY is capable of handling MII
Pre
management frames without the 32-bit preamble field. Returns 1, indicating support for suppressed
preamble MII management frames. This bit is read-only.
10
AN
Auto-negotiation complete. This bit is read-only and is cleared by default.
Done
0 Either the auto-negotiation process is underway or the auto-negotiation function is disabled.
1 The auto-negotiation process has completed.
11
Remote
Remote fault. This bit is read-only and is cleared by default. Each read of the status register clears this bit.
Fault
0 Normal operation.
1 A remote fault condition was detected. This bit latches high in order for software to detect the condition.
12
AN
Auto-negotiation ability. While read as set, this bit indicates that the PHY has the ability to perform
Ability
auto-negotiation. While read as cleared, this bit indicates the PHY lacks the ability to perform
auto-negotiation. Returns 1 on read. This bit is read-only.
13
Link
Link status. This bit is read-only and is cleared by default.
Status
0 A valid link is not established. This bit latches low allowing for software polling to detect a failure condition.
1 A valid link is established.
14
Reserved, should be cleared.
15
Extend
Extended capability. This bit indicates that the PHY contains the extended set of registers (those beyond
Ability
control and status). Returns 1 on read. This bit is read-only.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
15-126
6
7
8
Extend
No Pre
Status
0
0
1
0
Figure 15-120. Status Register Definition
Table 15-127. SR Descriptions
9
10
11
Remote
AN Done
Fault
1
0
0
Description
Access: Read only
12
13
14
Link
AN Ability
Status
1
0
0
Freescale Semiconductor
15
Extend
Ability
1

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