Freescale Semiconductor MPC8313E Family Reference Manual page 1188

Powerquicc ii pro integrated processor
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MRAS
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MBA
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MCAS
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MRAS
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MBA
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x 2
MCAS
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MRAS
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MBA
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MCAS
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MCAS
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
A-10
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11 10 9
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11 10 9
Add the following table for DDR2 Address Multiplexing for 16-Bit Data Bus:
Table 9-29. DDR2 Address Multiplexing for 16-Bit Data Bus
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
13 12 11 10 9
8
7
13 12 11 10 9
8
12 11 10 9
8
7
Address from Core Master
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7
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1
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0
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Address from Core Master
2 1 0
2 1 0
6
5
4
3
2
1
0
2 1 0
7
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3
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1
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4
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1
0
8
7
6
5
4
1
0
1
0
7
6
5
4
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
1 0
9 8 7 6 5 4 3 2 1 0
1
0
9
8
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4
Freescale Semiconductor
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3
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lsb
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