Freescale Semiconductor MPC8313E Family Reference Manual page 1052

Powerquicc ii pro integrated processor
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Universal Serial Bus Interface
usually also maps to one high-speed isochronous split transaction. The exception to this rule is the
H-Frame boundary wrap cases mentioned above.
The siTD data structure describes at most, one frame's worth of high-speed transactions and that
description is strictly bounded within a frame boundary.
top are examples of the full-speed transaction footprints for the boundary scheduling cases described
above. In the middle are time-frame references for both the B-Frames (HS/FS/LS Bus) and the H-Frames.
On the bottom is illustrated the relationship between the scope of an siTD description and the time
references. Each H-Frame corresponds to a single location in the periodic frame list. The implication is
that each siTD is reachable from a single periodic frame list location at a time.
4
5
6
7
B-Frame
Y–1
5
6
7
0
H-Frame
Y–1
Each case is described below:
Case 1: One siTD is sufficient to describe and complete the isochronous split transaction because
the whole isochronous split transaction is tightly contained within a single H-Frame.
Case 2a, 2b: Although both INs and OUTs can have these footprints, OUTs always take only one
siTD to schedule. However, INs (for these boundary cases) require two siTDs to complete the
scheduling of the isochronous split transaction. siTDX is used to always issue the start-split and
the first N complete-splits. The full-speed transaction (for these cases) can deliver data on the
full-speed bus segment during microframe 7 of H-Frame
complete splits are scheduled using siTD
must use the buffer pointer from siTD
from H-Frame
Y+2
Software must apply the following rules when calculating the schedule and linking the schedule data
structures into the periodic schedule:
Software must ensure that an isochronous split-transaction is started so that it will complete before
the end of the B-Frame.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
16-110
Full-Speed Transaction
Case 1
Case 2a
0
1
2
3
4
5
B-Frame
Y
1
2
3
4
5
6
H-Frame
Y
siTD
X
Back Pointer
Figure 16-58. siTD Scheduling Boundary Examples
is to use siTD
's back pointer.
X+2
Figure 16-58
Case 2b
6
7
0
1
2
3
B-Frame
7
0
1
2
3
4
H-Frame
siTD
X+1
, or microframe 0 of H-Frame
Y+1
(not shown). The complete-splits to extract this data
X+2
. The only way for the host controller to reach siTD
X+1
illustrates some examples. On the
4
5
6
7
0
1
B-Frame
Y+1
5
6
7
0
1
2
H-Frame
Y+1
Freescale Semiconductor
2
Y+2
3
Y+2
. The
Y+2
X+1

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