Freescale Semiconductor MPC8313E Family Reference Manual page 287

Table 5-71. PCI Defined Power Management State Support (continued)
PCI Dx
Supported
Power State
D3Hot Yes
*
D3Cold Yes
For completeness, Table 5-72
supports. If the device is used as a PCI agent, the supported bus states are B0 and B1, since the PCI clock
is running in these two states. Otherwise, as a host, the device could be configured to support all the bus
states.
PCI Bx PCI Bus PCI Bus
Bus State VDD Clock
B0 (full on) On
B1 On
B2 On
B3 Off
1
Requires the device to hold the PCI bus in idle state
2
The device cannot process wake-up events with the PCI bus in this state and the bus must be returned to B0 state through a
PORESET.
3
Requires the device to turn off PCI bus clock
4
The device cannot process wake-up events with the PCI bus in this state and the bus must be returned to B0 state through a
PORESET.
5
Requires the device to turn off the PCI bus clock through the output clock control register (OCCR), and to turn off the PCI bus
VDD through some customer-defined method (perhaps GPIO).
Below is a summary of the new PCI Power Management Interface Specification capabilities supported on
the device:
• Generation of PCI_PME signal to an external PCI host when the device is operating in agent mode.
• Responding to PCI_PME as an input wake-up event when the device is operating as PCI host.
• Responding to other wake-up events from various sources: Ethernet Magic Packet, USB, GPIO,
internal timer, external interrupt, PCI PME# (PCI_PME).
• Properly sequencing the device into and out its lowest power mode where VDD is removed to a
portion of the die.
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
e300 in Sleep mode. In D3Hot VDD is still applied to the entire device. In this mode you have an
option to power-off a portion of the device VDD. This is referred to as D3Warm. In D3Warm,
power is removed to the e300, DDR, LBC and IPIC. Power is not removed to Ethernet, USB, PCI,
GPIO and timers. PME signaling is supported in either D3Hot or D3Warm.
*
PME signaling is not supported in D3Cold. For PME signaling, use the D3Warm state, which is
similar to PCI D3Hot state but with a portion of the chip powered off.
According to PCI PM Specification 1.2, in D3Cold the PCI clock is removed and all devices will
be reset when power is restored. The device can be placed into D3Cold state, but wake-up
events cannot be recognized or generated and when power is restored, the device must go
through a normal power-on reset boot sequence as it needs to be re-initialized.
shows the PCI bus power management states (B0–B3) that the device
Table 5-72. PCI Bus Power Management State Support
PCI Bus Activity
Yes Any PCI transaction, function interrupt, or PME event
Yes PME event; bus is idle
No PME event
No PME event
How Supported
Support in PCI
Agent Mode
2
No
4
No (no bus clock
or VDD)
System Configuration
Support in PCI
Host Mode
Yes Yes
1
Yes Yes
3
(no bus Yes
clock)
5
Yes
5-77