Freescale Semiconductor MPC8313E Family Reference Manual page 606

PCI Bus Interface
Table 13-6. PCI_CONFIG_ADDRESS Field Descriptions (continued)
Bits Name
23–16 BN
15–11 DN
10–8 FN
7–2 RN
1–0 —
13.3.1.2 PCI_CONFIG_DATA
An access to PCI_CONFIG_DATA usually generates a PCI configuration transaction if
PCI_CONFIG_ADDRESS[EN] is set. There are some exceptions contained in the description of
PCI_CONFIG_ADDRESS[EN].
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
13-14
Bus number. Specifies the bus segment to which a configuration transaction is directed. If this field
is 0, a Type 0 configuration transaction is generated. Otherwise, a Type 1 configuration transaction
is generated.
Device number. Specifies the device to which a configuration transaction is directed. For a Type 0
configuration transaction, this field is decoded to individual PCI1_IDSEL signals for the address
phase according to the following values. For a Type 1 configuration transaction, this field is used
directly for the address phase.
Value
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
00000
Others
Function number. Specifies the function to which the configuration transaction is directed on a
multi-function device. It is used directly in the address phase of the configuration transaction.
Register number. Specifies the register being accessed in the PCI configuration space.
Reserved
Description
AD Signal that is Driving High
Special cycle / interrupt acknowledge
Internal access
31
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Reserved
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