Freescale Semiconductor MPC8313E Family Reference Manual page 604

PCI Bus Interface
Offset
0x84 PCIPMR1—PCI power management register 1
0x88– Reserved
0xFF
Offset
0x00 PCI error status register (PCI_ESR)
0x04 PCI error capture disable register (PCI_ECDR)
0x08 PCI error enable register (PCI_EER)
0x0C PCI error attributes capture register (PCI_EATCR)
0x10 PCI error address capture register (PCI_EACR)
0x14 PCI error extended address capture register (PCI_EEACR)
0x18 PCI error data capture register (PCI_EDCR)
0x20 PCI general control register (PCI_GCR)
0x24 PCI error control register (PCI_ECR)
0x28 PCI general status register (PCI_GSR)
0x38 PCI inbound translation address register 2 (PITAR2)
0x3C Reserved
0x40 PCI inbound base address register 2 (PIBAR2)
0x44 PCI inbound extended base address register 2 (PIEBAR2)
0x48 PCI inbound window attributes register 2 (PIWAR2)
0x50 PCI inbound translation address register 1 (PITAR1)
0x54 Reserved
0x58 PCI inbound base address register 1 (PIBAR1)
0x5C PCI inbound extended base address register 1 (PIEBAR1)
0x60 PCI inbound window attributes register 1 (PIWAR1)
0x68 PCI inbound translation address register 0 (PITAR0)
0x6C Reserved
0x70 PCI inbound base address register 0 (PIBAR0)
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
13-12
Table 13-4. PCI Configuration Access Registers (continued)
Register
Table 13-5. PCI Memory-Mapped Registers
Register
PCI Controller—Block Base Address 0x0_8500
PCI Error Management Registers
PCI Control and Status Registers
PCI Inbound ATU Registers
Access Reset
R/W 0x00 n 0_0000
— —
Access Reset
w1c All zeros
R/W All zeros
R/W All zeros
R/W All zeros
R All zeros
R All zeros
R/W All zeros
R/W All zeros
R/W All zeros
R All zeros
R/W All zeros
— —
R/W All zeros
R/W All zeros
R/W All zeros
R/W All zeros
— —
R/W All zeros
R/W All zeros
R/W All zeros
R/W All zeros
— —
R/W All zeros
Freescale Semiconductor
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13.3.3.28/13-42
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