Freescale Semiconductor MPC8313E Family Reference Manual page 538

Enhanced Local Bus Controller
Bits Name
31 LAST Last word. When LAST is read in a RAM word, the current UPM pattern terminates and control signal
timing set in the RAM word is applied to the current (and last) cycle. However, if the disable timer is
activated and the next access is to the same bank, execution of the next UPM pattern is held off and the
control signal values specified in the last word are extended in duration for the number of clock cycles
specified in M x MR[DS n ].
0 The UPM continues executing RAM words.
1 Indicates the last RAM word in the program. The service to the UPM request is done after this cycle
concludes.
In case of UPM writes, program UTA and LAST in same RAM word.
In case of UPM reads, program UTA and LAST in consecutive or same RAM words.
10.4.4.4.2 Chip-Select Signal Timing (CST n )
If BRn[MSEL] of the accessed bank selects a UPM on the currently requested cycle, the UPM manipulates
the LCSn for that bank with timing as specified in the UPM RAM word CSTn fields. The selected UPM
affects only the assertion and negation of the appropriate LCSn signal. The state of the selected LCSn
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
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Table 10-40. RAM Word Field Descriptions (continued)
Description
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