Modified Weighted Round-Robin Queuing (Mwrr) - Freescale Semiconductor MPC8313E Family Reference Manual

Powerquicc ii pro integrated processor
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ring = 0;
while ring <= 7 loop
if enabled(ring) and not ring_empty(ring) then
transmit_frame(ring);
ring = 0;
else
ring = ring + 1;
endif
endloop
endloop
15.6.4.3.2

Modified Weighted Round-Robin Queuing (MWRR)

eTSEC implements a modified weighted round-robin scheduling algorithm across all enabled TxBD rings
when TCTRL[TXSCHED] = 10. In MWRR, the weights in the TR03WT and TR47WT registers
determine the ideal size of each transmit slot, as measured in multiples of 64 bytes. Thus, to set a transmit
slot of 512 bytes, a weight of 512/64 or 8 needs to be set for the ring. In this mode TxBD rings 1–7 are
selected in round-robin fashion, whereas TxBD ring 0, if enabled with ready data for transmission, is
always selected in between other rings so as to expedite transmission from ring 0.
The scheduling decision is then achieved as follows:
for ring = 1..7 and enabled(ring) loop
credit[ring] = 0;
endloop
for ring = 1..7 and enabled(ring) loop
if not ring_empty(0) then
credit[0] = credit[0] + weight[0];
while credit[0] > 0 loop
transmit_frame(0);
credit[0] = credit[0] - frame_size;
if ring_empty(0) then
credit[0] = 0;
endif
endloop
endif
if not ring_empty(ring) then
credit[ring] = credit[ring] + weight[ring];
endif
while credit[ring] > 0 loop
transmit_frame(ring);
credit[ring] = credit[ring] - frame_size;
if ring_empty(ring) then
credit[ring] = 0;
endif
endloop
endloop
The algorithm checks registers TQUEUE[EN0–EN7] for
and TRxWT for
ring_empty(),
throughput for that ring is:
rate of queue[k] (K = 1 to 7) = (available bandwidth) * WTk/(sum(WTi) + 6WT0)
rate of queue(0) = (available bandwidth) * 7 * WT0/(sum(WTi) + 6WT0)
where i = 0 to 7
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
15-176
. For TxBD ring k, having a weight WTk, the long term average
weight()
, TSTAT[THLT0–THLT7] for
enabled()
Freescale Semiconductor

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