Transmit And Receive 1024- To 1518-Byte Frame Counter (Trmax); Transmit And Receive 1519- To 1522-Byte Vlan Frame Counter (Trmgv) - Freescale Semiconductor MPC8313E Family Reference Manual

15.5.3.6.6

Transmit and Receive 1024- to 1518-Byte Frame Counter (TRMAX)

Figure 15-58 describes the definition for the TRMAX register.
Offset eTSEC1:0x2_4694; eTSEC2:0x2_5694
0
R
W
Reset
Figure 15-58. Transmit and Received 1024- to 1518-Byte Frame Register Definition
Table 15-62 describes the fields of the TRMAX register.
Bits Name
0–9 — Reserved
10–31 TRMAX Increments for each good or bad frame transmitted and received which is 1024–1518 bytes in length,
inclusive (excluding preamble and SFD but including FCS bytes).
15.5.3.6.7

Transmit and Receive 1519- to 1522-Byte VLAN Frame Counter (TRMGV)

Figure 15-59 describes the definition for the TRMGV register.
Offset eTSEC1:0x2_4698; eTSEC2:0x2_5698
0
R
—
W
Reset
Figure 15-59. Transmit and Received 1519- to 1522-Byte VLAN Frame Register Definition
Table 15-63 describes the fields of the TRMGV register.
Bits Name
0–9 — Reserved
10–31 TRMGV Increments for each good or bad frame transmitted and received which is 1519–1522 bytes in length,
inclusive (excluding preamble and SFD but including FCS bytes).
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
9 10
—
Table 15-62. TRMAX Field Descriptions
9 10
Table 15-63. TRMGV Field Descriptions
Enhanced Three-Speed Ethernet Controllers
TRMAX
All zeros
Description
TRMGV
All zeros
Description
Access: Read/Write
31
Access: Read/Write
31
15-83