9.5
Usage Note
9.5.1
Setting Module Stop Mode
The module stop control register can be used to enable or disable PWMU operation. The default
setting disables PWMU operation. Clearing the module stop mode enables registers to be
accessed. For details, see section 26, Power-Down Modes.
9.5.2
Note on Using 16-Bit/12-Bit Single-Pulse PWM Timer
When the duty cycle is to be changed in usage of a 16-bit/12-bit single-pulse PWM timer, the
higher- and lower-order eight bits must be individually written to the respective PWMREGn (n =
0 to 5) registers. There will thus be a time lag between the write operations, and this may lead to
the output of a pulse waveform with a duty cycle other than the intended one during the
corresponding period.
Also, care must be taken to ensure that there are no interrupts while writing to PWMREGn is in
progress, since interrupt processing can lead to the continued output of pulses with a duty cycle
other than the intended one.
Section 9 8-Bit PWM Timer (PWMU)
Rev. 1.00 May 09, 2008 Page 221 of 954
REJ09B0462-0100